Graphene could bring a variety of exceptional benefits in areas from electronics, optics/photonics, to communications, energy and biocompatible applications. Its atomic-thin nature makes it appealing for integrated technologies. The possibility of tuning its charge transport properties dynamically without the need for redesigning a device, offers a level of versatility previously unavailable with conventional thin-films.
However, despite the interest, the introduction of graphene into semiconductor technologies is complex. There are several specific challenges that graphene has encountered in this respect, starting from the need for a direct, consistent wafer-scale synthesis and to ensure reliability aspects.
Our approach is aimed at obtaining epitaxial graphene on silicon substrates in a site-selective fashion. The process is based on the use of a solid-state source of carbon – cubic silicon carbide on silicon – combined with a liquid-phase-epitaxy growth of graphene using a catalytic alloy of nickel and copper. This technology has allowed us to reveal for the first time the electronic transport properties of epitaxial graphene on 3C-SiC on silicon over large scales, revealing a sheet resistance comparable to that of epitaxial graphene on SiC wafers. We will show how the control of the graphene interfaces can be a more important factor than achieving large grain sizes. In addition, we indicate that, depending on the chosen application, well-engineered defects in graphene are key to achieving the desired performance.
We will showcase this through our examples of integrated applications aimed to increase the number of functionalities available on a silicon platform.
Francesca Iacopi received her MSc in Physics from Roma La Sapienza University, Italy (1996), and her PhD in E.E./Materials Science from the Katholieke Universiteit Leuven, Belgium (2004). She is currently Professor of Electronics in the Faculty of Engineering and IT of the University of Technology Sydney, Chief Investigator and Chair of Industry Liaison of the ARC Centre of Excellence in Transformative Meta-Optical Systems (TMOS), and Associate Investigator in FLEET.
Iacopi has over 20 years’ R&D experience in semiconductor Industry and Academia. Her research focus is the translation of basic scientific advances in nanomaterials and novel device concepts into industrial processes. Her seminal work at IMEC on low-k dielectrics for on-chip interconnects over the 1999-2009 decade has informed the industrial uptake of porous dielectrics into modern semiconductor microprocessors. More recently, she invented a process to harness the properties of graphene on silicon for integrated micro-technologies. Major awards include a Gold Graduate Student Award from the Materials Research Society (2003), a Future Fellowship from the Australian Research Council (2012-2016), a Global Innovation Award (2014) and was listed among the 30 most innovative Australian engineers in 2018. Prof. Iacopi is a Fellow of the Institute of Engineers Australia, serves in the Board of Governors of the IEEE Electron Devices Society (2021-23), as well as in various standing committees for IEEE and the Materials Research Society.